本講主要實(shí)現(xiàn)usart TX的實(shí)現(xiàn)，主要分幾部分的應(yīng)用

1.USART 1 Tx polling的實(shí)現(xiàn)（附帶printf的實(shí)現(xiàn)）

2.USART1 Tx DMA的實(shí)現(xiàn)

3.USART1 TX DMA中斷的實(shí)現(xiàn)

話不多說(shuō)，開始

一．硬件原理圖

USART1在APB2總線上

二．寄存器圖

寄存器可以參考  參考手冊(cè)，在這里不做詳細(xì)討論

三．具體實(shí)現(xiàn)

1.      USART 1 Tx polling的實(shí)現(xiàn)（附帶printf的實(shí)現(xiàn)）

1）  編程步驟：

->使能PA9的時(shí)鐘

->使能USART1的時(shí)鐘

->配置PA9為推挽復(fù)用輸出

->配置USART1的波特率為115200（因?yàn)閁SART1在APB2上，計(jì)算方法為APB2 clock/波特率）

->使能USART1和TX和USART1

->Polling方式往USART1的DR寄存器填數(shù)據(jù)

->printf需要重定向fputc

2）  程序調(diào)試

->程序調(diào)用

USART1_Init();

USART1_TX_Polling(100);

->使能PA9,USART1的時(shí)鐘

/* 1.ENABLE USART1 GPIOA CLOCK */

RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;

/* 2. ENABLE USART1 IN APB2 BUS CLOCK */

RCC->APB2ENR |=RCC_APB2ENR_USART1EN;

->配置PA9為推挽復(fù)用輸出

/* 3.CONFIG GPIOA PA9 AF MODE */

GPIOA->CRH &= ~(GPIO_CRH_MODE9 |GPIO_CRH_CNF9);

GPIOA->CRH |=GPIO_CRH_MODE9 | GPIO_CRH_CNF9_1;

此處需要注意一個(gè)特別重要的細(xì)節(jié)：因?yàn)镃RH默認(rèn)的value是：

所以如果沒(méi)有清除到bit4-bit7，直接進(jìn)行或運(yùn)算就會(huì)造成錯(cuò)誤，成為開漏模式，CRL寄存器同樣道理，正常運(yùn)行如圖：

->配置波特率為115200

USART1->BRR |= 0x271;

運(yùn)行效果圖

->使能USART1和USART1 TX

USART1->CR1 |= USART_CR1_UE | USART_CR1_TE |USART_CR1_RE;

-> Polling方式往USART1的DR寄存器填數(shù)據(jù)

voidUSART1_TX_Polling(int loop_cnt)

{

    int index = 0;

    for(;index < loop_cnt;index++)

    {

        while ((USART1->SR &USART_SR_TXE) == 0);

        USART1->DR= 'a';            

    }

    while(1);

}

運(yùn)行圖

->printf fputc重定向

int fputc(int ch, FILE *fp)

{

    if (fp == stdout)

    {

        if (ch == '\n')

        {

            while((USART1->SR & USART_SR_TXE) == 0);

            USART1->DR ='\r';

        }

        while ((USART1->SR &USART_SR_TXE) == 0);

        USART1->DR = ch;

    }

    return ch;

}

2.      USART1 Tx DMA的實(shí)現(xiàn)

1）  編程步驟

->使能PA9的時(shí)鐘

->使能USART1的時(shí)鐘

->配置PA9為推挽復(fù)用輸出

->配置USART1的波特率為115200（因?yàn)閁SART1在APB2上，計(jì)算方法為APB2 clock/波特率）

->使能USART1和TX和USART1

->設(shè)置DMA，請(qǐng)參照DMA文章：

http://blog.csdn.net/xiaoxiaopengbo/article/details/77434744

程序源碼

unsigned char buffer[52] = "DMA DATA TEST";

void USART1_TX_DMA()

{

    RCC->AHBENR |= RCC_AHBENR_DMA1EN;

    USART1->CR3 |= USART_CR3_DMAT;

    /* 6. CONFIG DMA */

    DMA1_Channel4->CMAR = (uint32_t)buffer;

    DMA1_Channel4->CPAR =(uint32_t)&USART1->DR;

    DMA1_Channel4->CNDTR = strlen(buffer);

    DMA1_Channel4->CCR |= DMA_CCR4_PL |DMA_CCR4_DIR | DMA_CCR4_MINC | DMA_CCR4_EN;

    while ((DMA1->ISR & DMA_ISR_TCIF4) ==0);

    DMA1->IFCR = DMA_IFCR_CTCIF4;

    DMA1_Channel4->CCR &= ~DMA_CCR4_EN;

    while(1);

}

程序調(diào)試圖：

3.      USART1 TX DMA中斷的實(shí)現(xiàn)

1）  編程步驟

->設(shè)置USART1

->設(shè)置DMA以及NVIC中斷

->編寫DMA中斷函數(shù)

2）  程序源碼

void USART1_TX_DMA_IRPT()

{

    NVIC_SetPriorityGrouping(4);

    NVIC_SetPriority(DMA1_Channel4_IRQn, 1);

    RCC->AHBENR |= RCC_AHBENR_DMA1EN;

    USART1->CR3 |= USART_CR3_DMAT;

    /* 6. CONFIG DMA */

    DMA1_Channel4->CMAR = (uint32_t)buffer;

    DMA1_Channel4->CPAR =(uint32_t)&USART1->DR;

    DMA1_Channel4->CNDTR = strlen(buffer);

    DMA1_Channel4->CCR |= DMA_CCR4_PL |DMA_CCR4_TCIE | DMA_CCR5_HTIE | DMA_CCR4_DIR | DMA_CCR4_MINC | DMA_CCR4_EN;

    NVIC_EnableIRQ(DMA1_Channel4_IRQn);

    while ((DMA1->ISR & DMA_ISR_TCIF4) ==0);

    DMA1->IFCR = DMA_IFCR_CTCIF4;

    DMA1_Channel4->CCR &= ~DMA_CCR4_EN;

    while(1);

}

3）  程序調(diào)試

四. 整個(gè)程序源碼

#include

#include

unsigned char buffer[52] = "DMA DATA TEST";

void USART1_Init()

{

    /* 1. ENABLE USART1 GPIOA CLOCK */

    RCC->APB2ENR |= RCC_APB2ENR_IOPAEN;

    /* 2. ENABLE USART1 IN APB2 BUS CLOCK */

    RCC->APB2ENR |= RCC_APB2ENR_USART1EN;

    /* 3. CONFIG GPIOA PA9 AF MODE */

    GPIOA->CRH &= ~(GPIO_CRH_MODE9 |GPIO_CRH_CNF9);

    GPIOA->CRH |= GPIO_CRH_MODE9 |GPIO_CRH_CNF9_1;

    GPIOA->CRH &= ~(GPIO_CRH_MODE10 |GPIO_CRH_CNF10);

    GPIOA->CRH |= GPIO_CRH_CNF10_1;

    /* 4. CONFIG USART1 BAUD RATE 115200 */

    USART1->BRR |= 0x271;

    /* 5. ENBALE TRANSPORT AND ENABLE USART1 */

    USART1->CR1 |= USART_CR1_UE |USART_CR1_TE | USART_CR1_RE;

}

void USART1_TX_Polling(int loop_cnt)

{

    int index = 0;

    for(;index < loop_cnt;index++)

    {

             while ((USART1->SR &USART_SR_TXE) == 0);

             USART1->DR = 'a';            

    }

    while(1);

}

void USART1_TX_DMA()

{

    RCC->AHBENR |= RCC_AHBENR_DMA1EN;

    USART1->CR3 |= USART_CR3_DMAT;

    /* 6. CONFIG DMA */

    DMA1_Channel4->CMAR = (uint32_t)buffer;

    DMA1_Channel4->CPAR =(uint32_t)&USART1->DR;

    DMA1_Channel4->CNDTR = strlen(buffer);

    DMA1_Channel4->CCR |= DMA_CCR4_PL |DMA_CCR4_DIR | DMA_CCR4_MINC | DMA_CCR4_EN;

    while ((DMA1->ISR & DMA_ISR_TCIF4) ==0);

    DMA1->IFCR = DMA_IFCR_CTCIF4;

    DMA1_Channel4->CCR &= ~DMA_CCR4_EN;

    while(1);

}

void DMA1_Channel4_IRQHandler(void)

{

    if (DMA1->ISR & DMA_ISR_HTIF4)

    {

             DMA1->IFCR = DMA_IFCR_CHTIF4;

             //printf("HTIF: %d\n",DMA1_Channel4->CNDTR);

    }

    if (DMA1->ISR & DMA_ISR_TCIF4)

    {

             DMA1->IFCR = DMA_IFCR_CTCIF4;

             //printf("TCIF: %d\n",DMA1_Channel4->CNDTR);

    }

}

void USART1_TX_DMA_IRPT()

{

    NVIC_SetPriorityGrouping(4);

    NVIC_SetPriority(DMA1_Channel4_IRQn, 1);

    RCC->AHBENR |= RCC_AHBENR_DMA1EN;

    USART1->CR3 |= USART_CR3_DMAT;

    /* 6. CONFIG DMA */

    DMA1_Channel4->CMAR = (uint32_t)buffer;

    DMA1_Channel4->CPAR =(uint32_t)&USART1->DR;

    DMA1_Channel4->CNDTR = strlen(buffer);

    DMA1_Channel4->CCR |= DMA_CCR4_PL |DMA_CCR4_TCIE | DMA_CCR5_HTIE | DMA_CCR4_DIR | DMA_CCR4_MINC | DMA_CCR4_EN;

    NVIC_EnableIRQ(DMA1_Channel4_IRQn);

    while ((DMA1->ISR & DMA_ISR_TCIF4) ==0);

    DMA1->IFCR = DMA_IFCR_CTCIF4;

    DMA1_Channel4->CCR &= ~DMA_CCR4_EN;

    while(1);

}

int fputc(int ch, FILE *fp)

{

    if (fp == stdout)

    {

             if (ch == '\n')

             {

                       while ((USART1->SR& USART_SR_TXE) == 0);

                       USART1->DR = '\r';

             }

             while ((USART1->SR &USART_SR_TXE) == 0);

             USART1->DR = ch;

    }

    return ch;

}

int main()

{

    USART1_Init();

    // USART1_TX_Polling(100);

    // USART1_TX_DMA();

    //USART1_TX_DMA_IRPT();    

    while(1);

}