Start(void); 
void Stop(void); 
u8   CurrentRead(void); 
u8   RandomRead(u8 addr); 
void ByteWrite(u8 addr,u8 data); 
void SendByte(u8 data);

void I2c_Ack(void); 
void I2c_NoAck(void); 
u8   I2c_CheckAck(void); 
u8   ReadByte(void); 
void CommandWrite(u8 addr); 
void PageWrite(u8 *data,u8 cnt,u8 BeginAddr); 
void SequentialRead(u8 *data,u8 cnt,u8 BeginAddr); 

#define SDA R60 
#define SCL R61 

u8 array[2]; 




//////////////////////////////////////////////////////////// 
// read Routine 

u8 ReadByte(void) 
{ 
    u8 i; 
    u8 data; 
     
    P6CR |= 0x01;                         //change to input 
    for (i=0;i<8;i++) 
    { 
        data <<= 1;                   
        if (SDA)    data++; 
        nop(); 
        SCL = 1; 
        nop(); 
        nop(); 
        SCL = 0;                     
    } 
    P6CR &= 0Xfe;             // change to output  
    return data; 
} 

u8 CurrentRead(void) 
{ 
    u8 data; 
    u8 ack; 
     
    Start(); 
    SendByte(0xA1);           // read command 
    ack = I2c_CheckAck(); 
    data = ReadByte(); 
    I2c_NoAck(); 
    Stop(); 
     
    return data; 
} 

u8 RandomRead(u8 addr) 
{ 
    u8 data; 
     
    CommandWrite(addr);     
    data = CurrentRead(); 
    return data;     
} 

void SequentialRead(u8 *data,u8 cnt,u8 BeginAddr) 
{ 
    u8 i; 
    u8 ack; 
     
    CommandWrite(BeginAddr);     
    Start(); 
    SendByte(0xA1);           // read command 
    ack = I2c_CheckAck(); 
     
    for (i=0;i    { 
        *data = ReadByte(); 
        I2c_Ack(); 
    } 
    I2c_NoAck(); 
    Stop();             
     
} 

//////////////////////////////////////////////////////////// 
// send Byte data via i2c 

void CommandWrite(u8 addr) 
{ 
    u8 ack; 
     
    Start(); 
    SendByte(0xA0); 
    ack = I2c_CheckAck(); 
    nop(); 
    SendByte(addr); 
    ack = I2c_CheckAck(); 
    nop();     
} 


void ByteWrite(u8 addr,u8 data) 
{ 
    u8 ack; 
     
    CommandWrite(addr); 
    SendByte(data);     
    ack = I2c_CheckAck(); 
    nop(); 
    Stop();     
} 

void PageWrite(u8 *data,u8 cnt,u8 BeginAddr) 
{ 
    u8 i; 
    u8 ack; 
     
    CommandWrite(BeginAddr); 
    for (i=0;i    { 
        SendByte((u8)*data);     
        ack = I2c_CheckAck();         
    }     
    Stop(); 
} 

//////////////////////////////////////////////////////////// 
// send 8 bit data 

void SendByte(u8 data) 
{ 
    u8 i; 
     
    for(i=0;i<8;i++)       
    {            
        if(data&0x80) 
        { 
            SDA = 1;      // sda = 1 
        }else{ 
            SDA = 0;      // sda = 0 
        } 
        nop(); 
        nop(); 
        SCL = 1; 
        nop(); 
        nop(); 
        SCL = 0; 
        data <<= 1; 
    } 
} 

//////////////////////////////////////////////////////////// 
// acknowLEDge of i2c 

void I2c_Ack(void) 
{ 
    SDA = 0; 
    nop(); 
    SCL = 1; 
    nop(); 
    nop(); 
    SCL = 0; 
} 

void I2c_NoAck(void) 
{ 
    SDA = 1; 
    nop(); 
    SCL = 1; 
    nop(); 
    nop(); 
    SCL = 0; 
} 

u8 I2c_CheckAck(void) 
{ 
    u8 rst; 
     
    rst = 0; 
    SDA = 1; 
    P6CR |= 0x01 ;       // SDA set to input 
    nop(); 
    SCL = 1; 
    if (!SDA) rst = 1;   // have ack  
    nop(); 
    SCL = 0; 
    P6CR &= 0xfe ;       // SDA set to output 
    return rst; 
} 
//////////////////////////////////////////////////////////// 
// start and stop of i2c bus 

void Start(void) 
{ 
    SDA = 1; 
    SCL = 1; 
    nop(); 
    nop(); 
    SDA = 0; 
    nop(); 
    nop(); 
    SCL = 0; 
    nop(); 
    nop(); 
} 

void Stop(void) 
{ 
    SDA = 0; 
    nop(); 
    nop(); 
    SCL = 1; 
    nop(); 
    nop(); 
    SDA = 1; 
    nop(); 
    nop(); 
}#include "EM78x156xx.h" 
#include "HEAD156.H" 


/////////////////////////////////////////////////// 
// function declare 

void SysInit(void); 
u8   KeySCAN(void); 
void Beep(s8 time); 
void ScanBuz(void); 
void StopBeep(void); 
void ScanIR(void); 
u8   CheckIR(void); 

/////////////////////////////////////////////////// 
// Global Variable 
u8 volatile IntrCnt; 
u8 MainStatus; 

enum{             // main status 
    PROTECT, 
    RELEASE, 
    RUNNING, 
    ALARM, 
}; 

u8 MsCnt; 

#define KEY_DOOR    0X01 
#define KEY_ACC     0X02 
#define KEY_BREAK   0X04 

u8 SaveKey; 
u8 Cont; 
u8 Trg; 

void main() 
{ 
    SysInit(); 
    sei(); 

    while(1) 
    { 
        wdtc(); 

        if (IntrCnt == 160)        // 20ms           
        { 
            IntrCnt = 0;             
            MsCnt++; 
             
            ScanBuz(); 
             
            ScanIR(); 
             
            if (KeyScan()) 
            { 
                if (Trg & KEY_DOOR) 
                { 
                    Beep(1); 
                      nop(); 
                } 
                if (Trg & KEY_ACC) 
                { 
                    Beep(1); 
                      nop(); 
                } 
                if (Trg & KEY_BREAK) 
                { 
                      nop(); 
                }         
            } 
             
            switch(MsCnt) 
            {     
                case 50:           // 1s             
                    MsCnt =0; 

                    break; 
                default: 
                    break; 
            }            
        } 
    } 
} 


/************************************************** 
              BUZZER PROCESS ROUTINE 
p61 
**************************************************/ 
#define BUZPIN  R65 
bit bBuzEn=0; 
bit bBuzSW; 
s8  cntBuzTimes; 
u8  cntBuz; 

void ScanBuz(void) 
{ 
    if (bBuzEn){ 
         
        if (cntBuzTimes == -1){ 
            BUZPIN = 1 ;                                 // END OF SOUND 
            return; 
        } 
         
        if (bBuzSW){ 
            BUZPIN = 1 ;             
            if (cntBuz-- == 0){ 
                cntBuz = 25 ;              // RELOAD DATA 
                bBuzSW = 0 ;                // CHANGE STATUS                 
            } 
        }else{ 
              BUZPIN = 0 ; 
             if (cntBuz-- == 0){ 
                cntBuz = 25 ;      
                bBuzSW = 1 ; 
                cntBuzTimes--;                       // 1 TIMES 
            } 
        } 
         
        if (cntBuzTimes == 0){ 
            bBuzEn = 0;                                  // END OF SOUND 
        } 
    } 
} 

void Beep(s8 time)        // time = n*tICk 
{  
    bBuzEn      = 1; 
    bBuzSW      = 1; 
    cntBuz      = 25;     
    cntBuzTimes = time; 
} 

void StopBeep(void) 
{ 
    bBuzEn = 0; 
    BUZPIN = 0; 
} 

/************************************************** 
               KEY SCAN ROUTINE 
P60 door    0 : close 1 : open 
P61 ACC     0 : open  1 : close 
P62 Break   0 : open  1 : close 

**************************************************/ 

u8 KeyScan(void) 
{ 
    u8 temp=0;  
     
     temp  = PORT6; 
     temp &= 0x07 ; 
     temp ^= 0x06 ; 
          
     if (temp != SaveKey){ 
         SaveKey = temp; 
         return 0; 
     }else{ 
        Trg  = SaveKey & (SaveKey ^ Cont);        // trigger entry 
        Cont = SaveKey;                        // continuous entry                                                       
        return 1;   
    }              
} 


/************************************************** 
             IR PROCESS ROUTINE  
**************************************************/ 
#define ir_port 0x05 
#define ir_pin  2 

#define    ir_pass       0 
#define    ir_lead       1 
#define    ir_receive    2 
#define    ir_syn        3 
#define    ir_delay      4 


#define    ir_dat_code   6 
#define    ir_dat_bit    24 

u8 ir_flag=0; 
u8 ir_reg_bit;                
u8 ir_reg_code;  
u8 ir_addr_hig; 
u8 ir_addr_low; 
u8 ir_user; 

#define CODE_LOCK   0x41 
#define CODE_UNLOCK 0x42 
#define CODE_SOUND  0x44 
#define CODE_BACK   0x49 
#define CODE_FIND   0x48 

void ScanIR(void) 
{ 
    if (CheckIR() == 0)   // if check error ,return 
    { 
        return; 
    }     
     
    ir_flag = 0; 
     
    switch(ir_user) 
    { 
        case CODE_LOCK: 
            Beep(2); 
            break; 
        case CODE_UNLOCK: 
            Beep(2); 
            break; 
        case CODE_SOUND: 
            Beep(2); 
            break; 
        case CODE_BACK: 
            Beep(2); 
            break; 
        case CODE_FIND: 
            Beep(2); 
            break; 
        default: 
            break;         
    } 
} 

u8 CheckIR(void) 
{ 
    u8 temp; 
     
    temp = ir_flag ^ 0xff; 
    temp&= 0x01; 
      
    if (temp)             // if ir_pass == 0 
    { 
        ir_flag &= 0xfe;  // clear pass flag 
        return 0; 
    } 
         
    if ((ir_addr_hig==0xf6) && (ir_addr_low == 0x7c)) 
    { 
        return 1;         // success 
    }else{     
        ir_flag = 0;  // clear pass flag 
        return 0;         // fail 
    } 
} 





//================================== 
void _iNTCall interrupt_l(void) @ 0x08:low_int 0 
{ 
    _asm{ 
         MOV     0x1f,a 
        swap   0x1f 
        swapa  0x03 
         MOV     0x1e,a   
    }       
} 
void _intcall interrupt(void) @ int 0 
{ 
    /////////////////////////////////////// 
    // intrrupt counter increase 
    IntrCnt++;     
     
    /////////////////////////////////////// 
    // RF receive 

    _asm{     
     
        int_ir: 
               jbc             %ir_flag,ir_pass 
               jmp             int_ir_end 
                
               jbc             %ir_flag,ir_receive 
               jmp             code_receive 
                
               jbc             %ir_flag,ir_lead 
               jmp             code_lead 
                
               jbc             ir_port,ir_pin           // if detect low level 
               jmp             int_ir_end 
               bs              %ir_flag,ir_lead 
               clr             %ir_reg_code 
        /***********************************************/        
        code_lead:        
               jbc             ir_port,ir_pin                       
               jmp             detect_hig     

        detect_low:                       
               jz              %ir_reg_code 
               jmp             int_ir_end       
        detect_error:        
               clr             %ir_reg_code            // time overflow error 
               bc              %ir_flag,ir_lead 
               jmp             int_ir_end 
                
        detect_hig:        
                                                       // calculate the low pulse width 
                MOV              a,@85 
               sub             a,%ir_reg_code          // reg > 85 
               jbs             0x03,0 
               jmp             detect_error 
                
                MOV              a,@87                   // reg < 87 
               sub             a,%ir_reg_code 
               jbc             0x03,0 
               jmp             detect_error 
                
               bs              %ir_flag,ir_receive     // lead have received ,begin to read code 
                
               bs              %ir_flag,ir_delay 
                MOV              a,@ir_dat_code 
                MOV              %ir_reg_code,a 
                MOV              a,@ir_dat_bit 
                MOV              %ir_reg_bit,a 
                
        //       jmp             int_ir_end 
        /***********************************************/         
        code_receive:                                                                                                                 
               jbs             %ir_flag,ir_syn               
               jmp             code_r1     
               jbc             ir_port,ir_pin                 
               jmp             int_ir_end                      
               bc              %ir_flag,ir_syn 
              
        code_r1:                           
               jbc             %ir_flag,ir_delay                 
               jmp             code_r2                

               jbs             ir_port,ir_pin           // high level begin       
               jmp             int_ir_end          
               bs              %ir_flag,ir_delay                    
        code_r2:               
               djz             %ir_reg_code                    
               jmp             int_ir_end 
              
               bc              %ir_flag,ir_delay               
               jbc             ir_port,ir_pin                
               jmp             code_one 
        code_zero:                
               bc              0x03,0 
               jmp             ram_shift  
        code_one:   
               bs              %ir_flag,ir_syn                            
               bs              0x03,0 
        ram_shift:                
               rlc             %ir_user 
               rlc             %ir_addr_low 
               rlc             %ir_addr_hig   
        code_end:  
                MOV              a,@ir_dat_code 
                MOV              %ir_reg_code,a                
               djz             %ir_reg_bit 
               jmp             int_ir_end            
               bs              %ir_flag,ir_pass                ; 接收成功標志                                            
        int_ir_end: 
               nop   
                        
    } // end of asm code                    
     
    /////////////////////////////////////// 
    // clear interrupt flag 
    TCIF = 0 ; 
    _asm{ 
        swapa  0x1e 
         MOV     0x03,a 
        swapa  0x1f    
    } 
} 

void SysInit(void) 
{ 
    cli();      
      
    /*---------------------------------------------------------------------------  
    CONT_SETUP 
         argument : TCC_1_1 ~ TCC_1_256              prescal        
                    TCC_SRC_INT   / TCC_SRC_EXT      source selection 
                    TCC_EDGE_RISE / TCC_EDGE_FALL    trige edge selection 
                    TCC_PRESCAL   / WDT_PRESCAL      TCC OR WDT USE PRESCAL    
    ---------------------------------------------------------------------------*/  
    _asm 
    { 
         MOV     a,@(WDT_PRESCAL|WDT_1_32 | TCC_SRC_INT)    //16.34ms intrupt time 
        contw 
    } 
     
    /* 
    IOW MACRO ARG1,ARG2 
                    IOR    REG1,REG2              IOR REG2 -> REG1 
                    IOW    REG1,REG2              IOW REG2 -> REG1                
    */ 
  
    P5CR = 0X04 ;                   // port5 I/O 
    P6CR = 0X07 ;                   // port6 I/O 
    PDCR = 0XFF ;                   // PULL DOWN  0:ENABLE,  1:DISABLE 
    ODCR = 0X00 ;                   // OPEN DRAIN 0:DISABLE, 1:ENABLE 
    PHCR = 0XF8 ;                   // PULL HIGH  0:ENABLE,  1:DISABLE 
     
    PORT5 = 0x0c; 
    PORT6 = 0x08; 
                
    /*---------------------------------------------------------------------------  
    WDT_SETUP     
        argument : WDT_ENABLE    / WDT_DISABLE          enable conrtol 
                   ROC_ENABLE    / ROC_DISABLE          R OPTION    
                   EIS_IO        / EIS_INT              P60 ACT AS IO OR INT PIN   
    ---------------------------------------------------------------------------*/   
  
    WDTCR = WDT_ENABLE|ROC_DISABLE|EIS_IO;    
     
    /*---------------------------------------------------------------------------  
    IMR1_SETUP 
         argument :  IMR_TCC    /IMR_EXT                              
    ---------------------------------------------------------------------------*/  

    IMR = IMR_TCC ; 
                        
} 

HEAD156.H

#ifndef _EMCDEF_H 
#define _EMCDEF_H 

typedef unsigned int     u8; 
typedef signed int       s8;  
typedef unsigned short   u16; 
typedef signed short     s16; 
typedef unsigned long    u32; 
typedef signed long      s32; 

#define sei()  _asm{eni} 
#define cli()  _asm{disi} 
#define wdtc() _asm{wdtc} 
#define nop()  _asm{nop} 

#define TRUE    1 
#define FALSE   0 
#define ENABLE  1 
#define DISABLE 0 
#define ON      1 
#define OFF     0 


/***************************************************** 
*                   CONT REGISTER                    * 
*****************************************************/ 
#define TCC_1_1                                       0x08          /*   TCC PRESCALE 1:1 (DEFAULT)       */       
#define TCC_1_2                                       0x00          /*   TCC PRESCALE 1:2                 */ 
#define TCC_1_4                                       0x01          /*   TCC PRESCALE 1:4                 */ 
#define TCC_1_8                                       0x02          /*   TCC PRESCALE 1:8                 */ 
#define TCC_1_16                                      0x03          /*   TCC PRESCALE 1:16                */ 
#define TCC_1_32                                      0x04          /*   TCC PRESCALE 1:32                */ 
#define TCC_1_64                                      0x05          /*   TCC PRESCALE 1:64                */ 
#define TCC_1_128                                     0x06          /*   TCC PRESCALE 1:128               */ 
#define TCC_1_256                                     0x07          /*   TCC PRESCALE 1:256               */ 
                                                                    /*   1/FOSC*PRESCAL*256               */   
#define WDT_1_1                                       0x00 
#define WDT_1_2                                       0x01 
#define WDT_1_4                                       0x02 
#define WDT_1_8                                       0x03 
#define WDT_1_16                                      0x04 
#define WDT_1_32                                      0x05 
#define WDT_1_64                                      0x06 
#define WDT_1_128                                     0x07                                                                                                
/****************************************************/ 
#define TCC_SRC_INT                                   0x00          /*   INTERNAL INSTRUCTION CLOCK       */           
#define TCC_SRC_ERX                                   0x20          /*   EXTERNAL CLOCK(TCC/P54 PIN)(DEF) */                    
#define TCC_EDGE_RISE                                 0x00 
#define TCC_EDGE_FALL                                 0x10 
#define TCC_PRESCAL                                   0x00 
#define WDT_PRESCAL                                   0x08 




/***************************************************** 
*                   WDT  ENABLE                      * 
*****************************************************/ 
#define WDT_ENABLE                                    0x80 
#define WDT_DISABLE                                   0x00 
#define ROC_ENABLE                                    0x01 
#define ROC_DISABLE                                   0x00 
#define EIS_IO                                        0x00 
#define EIS_INT                                       0x40 



/***************************************************** 
*            INTERRUPT MASK REGISTER                 * 
*****************************************************/ 
#define IMR_TCC                                       (u8)0X01 
#define IMR_ICI                                       (u8)0x02 
#define IMR_EXT                                       (u8)0x04 
#define IMR1_ALL_DISABLE                              (u8)0x00 
#define IMR1_ALL_ENABLE                               (u8)0xFF                  
/****************************************************/ 


#endif 

EM78x156xx.H

/**************************************************** 
 *    Header file for the Elan                         * 
 *    EM78P156E Chip                                    * 
 *    EM78P156N chip                                    * 
 *  Title: EM78X156 include file                    * 
 *    Description: The Definition of EM78x156            * 
 *                 Registers and Bits                 * 
 *    Company: ELAN MICROELECTRONICS (SZ) LTD.        * 
 *    Author:    HongXi.Tang                                * 
 *    Date: 10/05/2005                                * 
 *    Version: v1.0                                    * 
 ****************************************************/ 
  
static unsigned int TCC     @0x01:rpage 0; 
static unsigned int PC      @0x02:rpage 0; 
static unsigned int STATUS  @0x03:rpage 0; 
static unsigned int RSR     @0x04:rpage 0; 
static unsigned int PORT5   @0x05:rpage 0; 
static unsigned int PORT6   @0x06:rpage 0; 
static unsigned int ISR        @0x0F:rpage 0; 
  
/*======================================================; 
;  Special Purpose Registers Define                     ; 
; ======================================================; 
; 
; A: Accumulator 
; It can’t be addressed. 
; 
; CONT: Control Register 
; 
     ;{                        
                              ; bit 7 not used 
         mINT     ==  0x40    ; Interrupt enable flag 
                              ; "0" : Masked by DISI or hardware interrupt 
                              ; "1" : Enabled by ENI/RETI instructions 
         mTS      ==  0x20    ; TCC signal source 
                              ; "0" : Internal instruction cycle clock 
                              ; "1" : Transition on TCC pin 
         mTE      ==  0x10    ; TCC signal edge 
                              ; "0" : Increment if the transition from low to high takes place on TCC pin 
                              ; "1" : Increment if the transition from high to low takes place on TCC pin 
         mPAB     ==  0x08    ; Prescaler assignment bit 
                              ; "0" : Prescaler assign to TCC 
                              ; "1" : Prescaler assign to WDT 
         mPSR2    ==  0x04    ; TCC/WDT prescaler Select bit[2] 
         mPSR1    ==  0x02    ; TCC/WDT prescaler Select bit[1] 
         mPSR0    ==  0x01    ; TCC/WDT prescaler Select bit[0] 
                              ; |------|------|------|----------|----------| 
                              ; | PSR2 | PSR1 | PSR0 | TCC Rate | WDT Rate | 
                              ; |------|------|------|----------|----------| 
                              ; |  0   |  0   |  0   |   1:2    |   1:1    | 
                              ; |  0   |  0   |  1   |   1:4    |   1:2    | 
                              ; |  0   |  1   |  0   |   1:8    |   1:4    | 
                              ; |  0   |  1   |  1   |   1:16   |   1:8    | 
                              ; |  1   |  0   |  0   |   1:32   |   1:16   | 
                              ; |  1   |  0   |  1   |   1:64   |   1:32   | 
                              ; |  1   |  1   |  0   |   1:128  |   1:64   | 
                              ; |  1   |  1   |  1   |   1:256  |   1:128  | 
                              ; |------|------|------|----------|----------| 
        ;} 
; 
*/ 
  
static io unsigned int P5CR     @0x05:iopage 0; 
static io unsigned int P6CR     @0x06:iopage 0; 
static io unsigned int PCR      @0x0A:iopage 0;    //Prescaler Counter Register 
static io unsigned int PDCR     @0x0B:iopage 0;    //Push-down Control Register 
static io unsigned int ODCR     @0x0C:iopage 0;    //Open-drain Control Register 
static io unsigned int PHCR     @0x0D:iopage 0;    //Push-high Control Register 
static io unsigned int WDTCR     @0x0E:iopage 0;    //WDT Control Register 
static io unsigned int IMR        @0x0F:iopage 0;    //Interrupt Mask Register 
  
/*    STATUS bits    */ 
static bit GP2 @0x03@7:rpage 0;     
static bit GP1 @0x03@6:rpage 0; 
static bit GP0 @0x03@5:rpage 0;    //general purpose read/write bits 
static bit T   @0x03@4:rpage 0;    //time-out bit 
static bit P   @0x03@3:rpage 0;    //power down bit 
static bit Z   @0x03@2:rpage 0;    ///Zero flag 
static bit DC  @0x03@1:rpage 0;    //Auxiliary carry bit 
static bit C   @0x03@0:rpage 0;    //carry flag 
  
/*    PORT5 bits    */ 
static bit R53 @0x05@3:rpage 0; 
static bit R52 @0x05@2:rpage 0; 
static bit R51 @0x05@1:rpage 0; 
static bit R50 @0x05@0:rpage 0; 
  
/*    PORT6 bits    */ 
static bit R67 @0x06@7:rpage 0; 
static bit R66 @0x06@6:rpage 0; 
static bit R65 @0x06@5:rpage 0; 
static bit R64 @0x06@4:rpage 0; 
static bit R63 @0x06@3:rpage 0; 
static bit R62 @0x06@2:rpage 0; 
static bit R61 @0x06@1:rpage 0; 
static bit R60 @0x06@0:rpage 0; 
   
/*    interrupt static register(RF)    */ 
static bit EXIF @0x0F@2:rpage 0;    //External interrupt flag 
static bit ICIF @0x0F@1:rpage 0;    //input status changed interrupt flag 
static bit TCIF @0x0F@0:rpage 0;    //TCC overflowing interrupt flag  

無線接收碼形

__________|--------|__|-----------------------
lead        

lead = 11ms

|-----------|___    1 code , hig:1.1ms low 300us

|---|___________    0 code , hig: 300us  low 1.1ms

24 bit

address code

0xF67C

user code:

lock  : 0x41
unlock: 0x42
sound : 0x44
back  : 0x49
find  : 0x48

無線接收部分完成并且測試完畢。