說明

• NB6N14SMNGEVB, Clock/Data Receiver Evaluation Board. The NB6N14S is a differential 1:4 Clock or Data Receiver and will accept Any Level input signals: LVPECL, CML, LVCMOS, LVTTL, or LVDS. These signals will be translated to LVDS and four identical copies of Clock or Data will be distributed, operating up to 2.0 GHz or 2.5 Gb/s, respectively. As such, the NB6N14S is ideal for SONET, GigE, Fiber Channel, Backplane and other Clock or Data distribution applications. The NB6N14S has a wide input common mode range from GND + 50mV to VCC - 50mV. Combined with the 50-ohm internal termination resistors at the inputs, the NB6N14S is ideal for translating a variety of differential or single-ended Clock or Data signals to 350mV typical LVDS output levels